ACtE08 · Chapter 8Demo · Set 4🏛️ Past Licensure QuestionID: 87f77615
In the 8085 microprocessor interrupt structure, which of the following is true for the TRAP interrupt?
In the 8085 microprocessor interrupt structure, which of the following is true for the TRAP interrupt?
Multiple Choice Options
- A✓ Correct Option
Non-maskable and vectored
- B
Maskable and vectored
- C
Maskable and non-vectored
- D
Non-maskable and non-vectored
Detailed Technical Solution & Explanation
In the Intel 8085 microprocessor interrupt architecture:
•
TRAP: The highest-priority hardware interrupt. It is non-maskable (cannot be disabled using software instructions like
DI or SIM), meaning the CPU must respond to it immediately. It is also vectored, automatically branching execution to the fixed restart address 0024H (). It is triggered by both an edge and a level sensitive signal to prevent false noise triggers.Option Analysis:
•
Option A (Non-maskable and vectored): Correct; TRAP cannot be masked and branches to fixed vector address
0024H.•
Option B (Maskable and vectored): Incorrect; describes RST 7.5, RST 6.5, and RST 5.5.
•
Option C (Maskable and non-vectored): Incorrect; describes INTR.
•
Option D (Non-maskable and non-vectored): Incorrect; TRAP is vectored.
Reference: Demo · Set 4NEC Licensure Syllabus