ACtE08 · Chapter 8Demo · Set 4🏛️ Past Licensure QuestionID: 5588d6fc
Which of the following is true for the TRAP interrupt in the 8085 microprocessor?
Which of the following is true for the TRAP interrupt in the 8085 microprocessor?
Multiple Choice Options
- A✓ Correct Option
Non-maskable and asynchronous
- B
Maskable and synchronous
- C
Non-maskable and inverted
- D
None of the above
Detailed Technical Solution & Explanation
In the Intel 8085 microprocessor, TRAP (RST 4.5) has the highest priority and is Non-Maskable (cannot be disabled by DI instruction) and asynchronous (triggered by external hardware events using both edge and level detection).
Option Analysis:
•
Option A (Non-maskable and asynchronous): Correct. TRAP cannot be masked and responds to external hardware triggers asynchronously.
•
Option B (Maskable and synchronous): Maskable interrupts include RST 7.5, 6.5, 5.5, and INTR.
•
Option C (Non-maskable and inverted): Active high, not inverted.
•
Option D (None of the above): Incorrect.
Reference: Demo · Set 4NEC Licensure Syllabus