ACtE08 · Chapter 8Mock Test 06🏛️ Past Licensure QuestionID: 99391219
In the addition of two signed binary numbers in 2's complement representation, an arithmetic overflow condition occurs if and only if:
In the addition of two signed binary numbers in 2's complement representation, an arithmetic overflow condition occurs if and only if:
Multiple Choice Options
- A
The sum equals zero
- B
A = 0 and B = 0
- C✓ Correct Option
The carry-in to the sign bit differs from the carry-out from the sign bit (Cin ⊕ Cout = 1)
- D
The carry-out from the sign bit is 1
Detailed Technical Solution & Explanation
In 2's complement arithmetic, an overflow occurs when adding two numbers of like sign produces a result of the opposite sign. In binary adder logic, this occurs if and only if the carry into the sign bit position () differs from the carry out of the sign bit position (): .
Option Analysis:
•
Option A: Sum of zero is a valid arithmetic result.
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Option B: Adding zeros never causes overflow.
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Option C: Correct. Standard ALU overflow logic: .
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Option D: A carry-out can occur without overflow (e.g., adding positive and negative numbers).
Reference: Mock Test 06NEC Licensure Syllabus