ACtE04 · Chapter 4Mock Test 03🏛️ Past Licensure QuestionID: 2523eba6
In a three-bus internal CPU datapath architecture connecting the general-purpose register file to the ALU, how many source and destination ports does the register file require?
In a three-bus internal CPU datapath architecture connecting the general-purpose register file to the ALU, how many source and destination ports does the register file require?
Multiple Choice Options
- A✓ Correct Option
2 output read ports and 1 input write port
- B
1 output read port and 2 input write ports
- C
1 output read port and 1 input write port
- D
2 output read ports and 2 input write ports
Detailed Technical Solution & Explanation
In a three-bus processor datapath (Bus A, Bus B, Bus C):
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The ALU takes two input operands simultaneously and produces one output result ().
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To perform an ALU operation in a single clock cycle, the register file must provide two simultaneous read operands onto Bus A and Bus B, requiring 2 output (read) ports.
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The result on Bus C is written back into the destination register, requiring 1 input (write) port.
Thus, the register file requires 2 output ports and 1 input port.
Option Analysis:
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Option A (2 output read ports and 1 input write port): Correct; permits two source operand reads and one destination write simultaneously.
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Option B (1 output read port and 2 input write ports): Cannot supply both ALU inputs in one cycle.
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Option C (1 output read port and 1 input write port): Single-bus architecture constraint.
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Option D (2 output read ports and 2 input write ports): Redundant write port for standard single-issue ALUs.
Reference: Mock Test 03NEC Licensure Syllabus